1. Field of the Invention
This invention relates to an interface for a Digital Subscriber Line. More particularly, it relates to an audio codec capable of interfacing to a multi-megabit per second high speed broad band modem or Digital Subscriber Line by utilizing multiple time slots of a high speed time domain multiplexed data bus.
2. Background of Related Art
Efficient and inexpensive digitization of telephone grade audio has been accomplished for many years by an integrated device known as a "codec." A codec (short for COder-DECoder) is an integrated circuit or other electronic device which combines the circuits needed to convert analog signals to and from digital signals, e.g., Pulse Code Modulation (PCM) digital signals.
Early codecs converted analog signals at an 8 KHz rate into 8-bit PCM for use in telephony, and were not capable of handling modem inputs. More recently, the efficiency and low cost advantages of codecs have been expanded to convert analog signals at a 48 KHz sampling rate into 16-bit stereo (and even up to 20-bit stereo) for higher quality use beyond that required for telephony. With higher quality and broader bandwidth capability, today's codecs find practical application with consumer equipment such as voice band modems.
With the development of codecs for these more sophisticated purposes came the need to improve the analog signal-to-noise (S/N) ratio to at least 75 to 90 dB. One major step toward achieving this high S/N ratio was accomplished more recently by separating the conventional codec into two individual sub-systems: a controller sub-system or integrated circuit (IC) handling primarily the digital interface to a host processor, and an analog sub-system or IC handling primarily the interface to, mixing and conversion of analog signals. This split digital/analog architecture has been documented most recently as the "Audio Codec '97 Component Specification", Revision 1.03, Sep. 15, 1996 ("the AC '97 Specification"). The AC '97 Specification in its entirety is expressly incorporated herein by reference.
The modem capability of today's audio codecs such as those defined by the AC '97 Specification is limited in bandwidth to support only modems in the voice band having a sampling rate not exceeding 48 KHz (48 Kilosamples per second Ks/s). However, there is a growing consumer need for audio codecs to handle high capacity modem data. The current audio codecs, particularly the two sub-system audio codec defined by the AC '97 Specification, provide only an interface to a lower speed voice band modem using a single 16-, 18- or 20-bit time slot in a TDM serial data stream, at a maximum sampling rate of 48 Ks/s. The AC '97 Specification does not provide the capability to handle multi-megabit per second modem data sources such as from a high speed wide band modem.
FIG. 5 shows a conventional split-architecture audio codec interfacing to a low speed voice band modem 510 such as that defined by the AC '97 Specification. An AC controller sub-system 500 interfaces to an AC analog sub-system 502 via a five-wire time division multiplexed (TDM) bus referred to as the AC link 504. The five-wire TDM bus of the AC link 504 comprises a sync signal 512, a reset signal 520, a serial TDM data stream SDATA_OUT 516 from the AC controller sub-system 500 to the AC analog sub-system 502, a bit clock signal BIT_CLK 514, and a serial TDM data stream SDATA_IN 518 from the AC analog sub-system 502 to the AC controller 500. The bit clock signal BIT_CLK 514 is derived by a clock 506 utilizing an external crystal 508. The frequency of the external crystal 508 is divided in half by the clock 506 to provide a bit clock signal BIT_CLK 514 which is half of the frequency of the external crystal 508.
The AC analog sub-system 502 includes a single bi-directional modem interface capable of handling a low speed voice band modem 510 at a 16-, 18- or 20-bit per sample, 48 Ks/s maximum rate. This translates to a maximum 0.96 Mb/s conversion data rate of analog-to-digital converter (ADC) 522 and digital-to-analog converter (DAC) 524. There is no provision in the conventional split-architecture audio codec for handling a high speed broad band modem or any device having a sampling rate higher than 48 K/s or a data rate exceeding that of a voice band modem.
The circuitry in the conventional AC analog sub-system 502 which interfaces to the low-speed voice band modem includes ADC 522 and DAC 524. ADC 522 samples the analog modem signal input to the AC analog sub-system 502 and provides 16-, 18-, or 20-bit data at 48 K/s to the AC link 504 for insertion into time slot 5 of the serial TDM data stream SDATA_IN 518 input to the AC controller sub-system 500. Conversely, DAC 524 receives 16-, 18-, or 20-bit data from the serial TDM data stream SDATA_OUT 516 from the AC controller sub-system 500 of the AC link 504 and converts the same into an analog signal output to the low-speed voice band modem 510. Conventional demodulation and modulation techniques such as quadrature amplitude modulation (QAM) or Carrierless Amplitude and Phase (CAP) may be performed by a digital signal processor (DSP) and/or other processor in conjunction with the ADC 522 and DAC 524.
FIG. 6 depicts a conventional sync signal 512, serial TDM data stream SDATA_OUT 516, and serial TDM data stream SDATA_IN 518, in a twelve slot TDM bi-directional data stream between the analog and controller sub-systems 502,500 of a split-architecture audio codec such as in accordance with the AC '97 Specification. The twelve time slots 1 to 12 of the serial TDM data streams SDATA_OUT 516 and SDATA_IN 518 are framed by a sync signal 512. The sync signal 512 is derived from a TAG Phase 600 during time slot 0. All time slots are 20 bits wide.
Time slots 1 and 2 of the serial TDM data stream SDATA_OUT 516 from the AC controller sub-system 500 to the AC analog sub-system 502 comprise command addresses 601 and command data 602. Status addresses 621 and status data 622 are passed in time slots 1 and 2 of the serial TDM data stream SDATA_IN 518 from the AC analog sub-system 502 to the AC controller sub-system 500. Time slots 3 and 4 of the serial TDM data stream SDATA_OUT 516 and serial TDM data stream SDATA_IN 518 comprise the stereo pulse code modulated (PCM) audio data between the AC analog sub-system 502 and the AC controller sub-system 500.
Time slot 5 of the serial TDM data stream SDATA_IN and SDATA_OUT 518, 516 contains the data from and to the low speed voice band modem 510 (FIG. 5). Time slot 6 of the serial TDM data stream SDATA_IN 518 contains microphone PCM data. The remaining time slots 7 through 12 of both the serial TDM data stream SDATA_IN and SDATA_OUT 518, 516 and time slot 6 of the serial TDM data stream SDATA_OUT 516 are unused in the conventional split-architecture audio codec.
FIG. 7 depicts in more detail the bit clock signal BIT_CLK 514 and serial TDM data stream SDATA_OUT 516 with reference to the sync signal 512. The conventional bit clock signal BIT_CLK 514 is a fixed 12.288 MHz clock signal derived in the clock 506 from the external 24.576 MHz crystal oscillator 508 (FIG. 5).
Thus, conventional split-architecture audio codecs provide limited capacity to handle high data rate modems.